Would you like to recreate GPT-2 124m in a cave with a box of scraps and a 4090 in less than two hours? LETS SPEEDRUN!

Implementation of FlashAttention-2 for Nvidia Tesla V100

55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.

SystemVerilog frontend for Yosys

YPCB-00338-1P1 Hack

RTL logic synthesis

LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled

Lakeroad and Churchroad demo for Latch-Up 2025.

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Bringup-Bench is a collection of standalone minimal library and system dependence benchmarks useful for bringing up newly designed CPUs, accelerators, compilers and operating systems. You probably …

An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders

SystemVerilog frontend for Yosys

A Fast, Low-Overhead On-chip Network

A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)

Konata is an instruction pipeline visualizer for Onikiri2-Kanata/Gem5-O3PipeView formats. You can download the pre-built binaries from https://github.com/shioyadan/Konata/releases